About this role
Physical Design Intern at SK hynix memory solutions America Inc.. Location: San Jose, California, United States. Role: implementing layout, analyzing timing, optimizing ppa Requirements: Currently pursuing a BS/MS in EE/CE or related field; foundational VLSI and ASIC physical design knowledge; scripting experience (Python, Perl, TCL); familiarity with ASIC flow and strong analytical/problem-solving skills. Category: Engineering Seniority: No Prior Experience Required Tools: Python, Perl, TCL, Synopsys ICC2, Cadence Innovus, PrimeTime, Tempus, LEF/DEF, UPF/CPF, GPT, Copilot Commitment: Internship Workplace: Onsite Languages: English