About this role
<p style="margin:0.0in;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Job Title: Lead, Electrical Engineering </span></strong></p> <p style="margin:0.0in;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Job Code: 40536</span></strong></p> <p style="margin:0.0in;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Job Location: Fort Wayne, IN</span></strong></p> <p style="margin:0.0in 0.0in 0.0in -0.25pt;text-indent:-0.5pt;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Job Schedule: 9/80</span></strong></p> <p style="margin:0.0in;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a"> </span></strong></p> <p style="margin:0.0in 0.0in 0.0in -0.25pt;text-indent:-0.5pt;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Job Description: </span></strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a"> </span></p> <p style="margin:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">In a fast moving and increasingly complex world, L3Harris is anticipating and rapidly responding to challenges with agile technology – creating a safer and more secure future. L3Harris is seeking a dynamic Electrical Engineer to pursue a career in our fast-paced company where new designs become production reality. As a member of our product development staff, you will lead and support electrical teams in the creation of new technological initiatives and advancements. </span></p> <p style="margin:0.0in;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in 0.0in 0.0in -0.25pt;text-indent:-0.5pt;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Essential Functions: </span></strong></p> <ul style="margin-top:0.0in;margin-bottom:0.0in"> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Lead and support electrical design teams in the development of new products</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Own the cost and schedule of design electrical programmatic tasks</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Perform and report Earned Value Metrics to programs</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Conduct component, subsystem, and system level design trades and analyses</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Expertise in electrical/electronic analog and digital circuit design</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Collaborate with systems, mechanical, optical, software / firmware, and manufacturing engineering staff</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Lead and participate in design reviews</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Create engineering development plans, documents, and task flows for program execution</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Ability to obtain and maintain a security clearance</span></li> </ul> <p style="margin:0.0in 0.0in 0.0in 0.5pt;text-indent:-0.5pt;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a"><br>Qualifications:</span></strong></p> <ul style="margin-top:0.0in;margin-bottom:0.0in" type="disc"> <li style="color:#32363a;margin-bottom:0.0in;line-height:normal;background-color:white;margin-top:0.0in;margin-right:0.0in;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience.<br><br></span></li> </ul> <p style="margin:0.0in 0.0in 0.0in -0.25pt;text-indent:-0.5pt;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:#32363a">Preferred Additional Skills:</span></strong></p> <ul style="margin-top:0.0in;margin-bottom:0.0in" type="disc"> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience developing electrical engineering hardware within the defense, aerospace, or medical product fields</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">An understanding of mechanical, optical, software / firmware, and digital requirements is considered valuable</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience with Earned Value Management</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience with SOPs, process control, and standardization of work output</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience with deriving specifications and creating requirement flow down</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience making technically sound architecture decisions to guide development</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience developing a basis of estimate (BOE), cost, and/or schedule for electrical work products</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience performing Worst Case Circuit analysis</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Experience with DOORs, SPICE, MathCAD, Matlab, Simulink, Allegro and MentorGraphics tools</span></li> <li style="margin-bottom:0.0in;margin-top:0.0in;margin-right:0.0in;line-height:115%;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif">Active security clearance</span><span style="font-size:14.0pt;line-height:115%;font-family:Verdana, sans-serif;color:#32363a"> <br><br></span></li> </ul> <p style="margin:0.0in;line-height:normal;background-color:white;font-size:12.0pt;font-family:Aptos, sans-serif"><em><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:white"><br><br></span></em><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:white">#LI-KB1</span></p>