About this role
<p><em><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Title: Electrical Engineer, Specialist</strong></span></em></p> <p><em><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Number: 40454</strong></span></em></p> <p><em><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Location: </strong><strong>Yorba Linda, California, On Site</strong></span></em></p> <p><em><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Schedule: 4/10 Employees work 10 hour days, 4 days a week</strong></span></em></p> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong>Job Description:</strong></span></p> <p> </p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">L3Harris is seeking a Electrical Engineer with knowledge of job area in Analog, Digital, or RF engineering. Participate in complex projects or processes with general oversight. Communicates within and outside of own function to gain cooperation on operational processes, practices, and procedures. Makes moderate to substantial improvements to systems and processes. Contributes to achievement of departmental goals and operating plans with direct impact on the departmental results.</span></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"> </span></p> <p><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Essential Functions:</span></strong></p> <ul type="disc"> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Responsible for designing, developing, modifying, testing, evaluating and integrating electronic equipment, electronic parts, components, or integrated circuitry for complex, high performance hardware systems.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Determines design approaches and parameters.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Analyzes electrical requirements to determine feasibility of design within time and cost constraints.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Analyzes equipment to establish operating data, conducts experimental tests and evaluates results.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Selects components and equipment based on analysis of specifications and reliability.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Able to identify component operational characteristics that may impact system performance and or sustainability.</span></li> </ul> <ul type="disc"> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Supports and/or leads various design activities for new/existing products, predominantly involving medium frequencies/edge rates. Design for manufacturing is considered through all phases of the development process.</span></li> </ul> <ul type="disc"> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Applies moderately complex electrical engineering principles and techniques to support/lead design, development, documentation, verification, and manufacturing debug activities.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Supports and/or leads design modifications for existing products frequently driven by component obsolescence situations. The design modification is usually of moderate complexity and may require major card level redesign to absorb the necessary hardware changes.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Provides technical solutions to a wide range of difficult problems. Contributes to completion of milestones associated with specific projects that have significant effect on the success of a sub-process/small project task.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Ability to understand and generate schematics with digital and analog electronic circuits.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Ability to provide guidance for PCB layout.</span></li> </ul> <ul type="disc"> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">May also review vendor capability to support development. Includes the application of specialized skill sets including analog, digital, FPGA, DSP, CCA, power, antenna, and control systems knowledge as required.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">May develop, design, and assess the methodologies and performance of specialized algorithms for, Underwater Acoustics, sonar, communications, geophysical, and other sensor processing applications.</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Generation of Presentation materials and training</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Operation’s Manual development and release</span></li> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">Test Procedure development and release</span></li> </ul> <ul> <li style="font-size:14.0pt;font-family:verdana, geneva, sans-serif"><span style="font-size:14.0pt;font-family:verdana, geneva, sans-serif">5 to 10% Travel required.</span></li> </ul> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"> </p> <p><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Qualifications:</span></strong></p> <p> </p> <ul type="disc"> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Bachelor’s Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum 3 years of experience in Analog Circuit Design.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum 3 years of RF Electronics.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum 2 years of Schematics Capturing & PCBA Layout in either Altium or Cadence.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum 3 years Lab experience in trouble shooting electronics in Analog and RF domain.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Minimum 2 years of experience working with Network Analyzer, Frequency Generator, Vector Analyzer, and digital/analog scope.</span></li> </ul> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"> </p> <p><strong><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Preferred Additional Skills:</span></strong></p> <p> </p> <ul> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Familiarity with GPS Electronics / Circuit Design.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">A/D and D/A Circuit Design, Interfacing and use experience</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Familiarity with industry standard EDA tools including schematic capture, PCB layout and FPGA development/simulation.</span></li> <li style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">Experience in development of military products, a plus.</span></li> </ul> <p><strong> </strong></p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">In compliance with pay transparency requirements, the salary range for this role in California, Massachusetts, New Jersey, Washington, and the Greater D.C, Denver, or NYC areas is Min $92,500.00 - $171,500.00 Max. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.</span></p> <p style="font-family:verdana, geneva, sans-serif;font-size:14.0pt">LI-KA1</p> <p><span style="font-family:verdana, geneva, sans-serif;font-size:14.0pt"><strong> </strong></span></p>