About this role
Sr Principal Design Engineer at Cadence. Location: Bangalore, Karnataka, India. Role: designing circuits, leading IPs, mentoring engineers Requirements: 12+ years experience, BE/BTech or ME/MTech/MS in engineering, expertise in high-speed SerDes and memory interfaces (PCIe Gen3-6, GDDRx/DDR), analog/I/O design, SI/PI/ESD, leading complex IPs and mentoring engineers. Category: Engineering Seniority: Senior Level Commitment: Full Time Workplace: Onsite Languages: English