About this role
Senior RF/Analog Design Engineer at Arago. Location: Paris or Tel Aviv. Role: designing circuits, optimizing circuits, validating silicon Requirements: Extensive analog and RF IC design experience (<28nm nodes) with strong analog intuition, mixed-signal expertise, Cadence Virtuoso proficiency, post-silicon validation experience, and fluent English. Category: Engineering Seniority: Senior Level Tools: Cadence Virtuoso Commitment: Full Time Workplace: Onsite Languages: English